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Prof. K Sarangam

PhD (National Institute of Technology,Warangal)

Assistant Professor Gr-II

Department of Electronics and Communication Engineering

Room No: ECE 215   +91-870-2462445
sarangam_7@nitw.ac.in
8702462445 Edit Profile Bio Sketch

Research Areas

 Analog/mixed VLSI circuits 

 low power VLSI circuits 

 Sigma-Delta ADCs 

 VLSI Testing 

  • Courses Handled
  • Research IDs
  • Selected Publications
  • Project/Consultancy
  • Current PhD Students
  • Awards and Accolades
  • Additional Responsibilities
  • Microcontrollers Lab(EC306)
  • VLSI Test and Testability(EC26029)
  • Integrated Circuits and Applications(ECM03)
  • CMOS VLSI Design(EC254)
  • Analog Electronics(EC231)
  • Digital Circuit Design Lab(EC205)
  • VLSI Test & Testability(EC5215)
  • Analog and Digital Electronics Laboratory(EC182)
  • Analog and Digital Electronics(EC181)
  • Seminar - I(EC5248)
  • Seminar - II(EC5298)
  • Low power VLSI Design(EC5253)


  • Design Considerations into Circuit Applications for structurally Optimized FinFET, By K Sarangam, Praveen Kumar Mudidhe, Sresta Valasa, IOP, ECS Journal of Solid State Science and Technology, vol.12, pp., 2023
  • Design and Investigation of the 22 nm FinFET Based Dynamic Latched Comparator for Low power Applications, By K Sarangam, Aruru Sai kumar, B Naresh Kuamar Reddy, Springer, Transctions on Electrical and Electronic Materials, vol., pp., 2024
  • A Lower Third-order Passive Continues Time Sigma Delta Modulator using FinFET, By K Sarangam , Bheema Rao Nistala, Springer, LNEE, vol.686, pp., 2020
  • A novel FinFET Based Low Power High Speed Two Stage Dynamic Comparator, By K Sarangam , Bheema Rao Nistala, State science journal , Computer Integrated Manufacturing Systems, vol.28, pp.12, 2023
  • Design of FinFET Based High gain Low Power Two Stage OTA for Biomedical Applications, By K Sarangam, Bheema Rao Nistala, scope journal, Scope, vol.13, pp., 2023

Power management LDO for mobile applications and On-chip temperature sensor for a smart probe for ADA

  • Role Co-Principal Investigator
  • Type Research
  • Sponsor SMDP-C2SD MeitY
  • Duration 64 Months
  • Project Cost (INR) 5200088
  • Status Completed


DEVATA VEERANNA

  • Area of Research: High speed serial links

DEVULAPALLI RANJITH

  • Area of Research: Analysis and Design of Analog/Mixed signal circuits

L.SUNEEL

  • Area of Research: Low power Data converters

Naresh.D

  • Area of Research: Nano Electronic Devices & Circuits