Journal(s)
Optimising capacitated EV routing with quantum evolutionary algorithms and federated reinforcement learning,
By K Sarangam, Dharani Kumar Chowdary Mirappalli, K Raghava Rao,
Inderscience Publishers (IEL),
International Journal of Mathematical Modelling and Numerical Optimisation,
vol.16,
pp.235-249,
2026
Design and Implementation of a Secure and Accurate Electronic Voting Machine Using Verilog on Zynq FPGA,
By LC Harsha, SD Bharatula, BNK Reddy, K Sarangam,
IEEE,
Journal of Mobile Multimedia,
vol.,
pp.,
2025
Dielectric engineering in 18 nm double gate FinFETs: comparative analysis of high-K materials for enhanced device performance,
By K Sarangam, DKC Mirappalli, AS Kumar, CRP Reddy,
Springer,
Proceedings of the Indian National Science Academy,
vol.,
pp.,
2025
Design and Investigation of the 22 nm FinFET Based Dynamic Latched Comparator for Low power Applications,
By K Sarangam, Aruru Sai kumar, B Naresh Kuamar Reddy,
Springer,
Transctions on Electrical and Electronic Materials,
vol.,
pp.,
2024
A novel FinFET Based Low Power High Speed Two Stage Dynamic Comparator,
By K Sarangam , Bheema Rao Nistala,
State science journal ,
Computer Integrated Manufacturing Systems,
vol.28,
pp.12,
2023
Design Considerations into Circuit Applications for structurally Optimized FinFET,
By K Sarangam, Praveen Kumar Mudidhe, Sresta Valasa,
IOP,
ECS Journal of Solid State Science and Technology,
vol.12,
pp.,
2023
Design of FinFET Based High gain Low Power Two Stage OTA for Biomedical Applications,
By K Sarangam, Bheema Rao Nistala,
scope journal,
Scope,
vol.13,
pp.,
2023
A Lower Third-order Passive Continues Time Sigma Delta Modulator using FinFET,
By K Sarangam , Bheema Rao Nistala,
Springer,
LNEE,
vol.686,
pp.,
2020
200 kS/s, 10-Bit Low Power SAR ADC for Biomedical Applications,
By Lalit Kumar Mandrai, K. Sarangam ,
MICRO,
International Journal of Computer Applications (0975 – 8887) International Conference on Microelectronics, Circuits and Systems (MICRO-2014) ,
vol.,
pp.,
2014
Conference(s)
A PVT optimization technique to linearize a VCO current starved ring oscillator based VCO in PLL
By Sarangam.k,Bheema Rao.N,Veeranna.D,
TENKON,
2026
Design of On-Chip Variable-Width Inductor for RF Applications Using PCell Methodology
By Sindhupriya Taduri, Bheema Rao.N,Sarangam.k,
MNDCS 2026,
2026
DESIGN AND PERFORMANCE ANALYSIS OF CMOS CONTINUOUS-TIME LINEAR EQUALIZERS FOR HIGH-SPEED LINKS
By Sarangam.k,Bheema Rao.N,Ranjith.D,
IEMDST,
2026
Design of a Positive Feedback Preamplifier based Dynamic Comparator for High-Speed Applications in 65nm Technology
By Sarangam.k,Bheema Rao.N,Ranjith.D,
ICCCNT,
2026
A Novel current bleeder technique to linearize the performance of a transistor across PVT without noise degradation
By Sarangam.k,Bheema Rao.N,Veeranna.D,
IEMDST,
2026
Routability-Aware FPGA Design Automation with Graph Transformer Models
By B Naresh Kumar Reddy, Y Charan Krishna, K Sarangam,
2025 37th International Conference on Microelectronics (ICM),
2025
A Low-Power 5-Bit Hybrid Flash ADC with Comparator Segmentation for Radar Applications
By Bhagyashree Lodha, K Sarangam,
2025 IEEE International Conference on Electrical, Electronics, Communication and Computers (ELEXCOM),
2025
Design of Octagonal Split Inductor using Parameterized Cell Methodology for 5G Applications
By Taduri Sindhupriya, N.Bheema Rao,K.Sarangam,
SMARTGEN 2025,
2025
Accelerating Sorting Performance on FPGA: Combining Quick Sort and Heap Sort through Hybrid Pipelining,
By B. N. Kumar Reddy, K. Sarangam, S. Dandeliya, S. P. Sai Naidu and N. K. P,
2023 IEEE International Symposium on Smart Electronic Systems (iSES), ,
2023
Design and Energy Dissipation Analysis of Full-Adder for Low Power Applications Using Reversible Logic Gates
By K. Sarangam, B. C. Naik, B. N. Kumar Reddy and A. S. Kumar,
2023 3rd International Conference on Emerging Frontiers in Electrical and Electronic Technologies (ICEFEET), ,
2023
An Efficient FSR-based Approach for Self Notifying Chairs to Minimize Long Duration Sitting Postures,"
By K. Sarangam, T. Appala, B. V. Vani and A. S. Kumar,
2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT),,
2023
An Efficient Predictive Alimentary System using Machine Learning on the edge
By B. Seetharamulu, K. Maheedhar, A. Sharma, R. Charan, K. Sarangam and B. N. K. Reddy,
2022 6th International Conference on Devices, Circuits and Systems (ICDCS),,
2022
"A second-order Switched Capacitor Passive Sigma Delta Modulator with Bootstrapped switches in FinFET Technology,"
By K. Sarangam and N. Bheema Rao,
International Conference on Electrical, Communication, and Computer Engineering (ICECCE),
2021
"A FinFET based 2nd-Order Fully Differential Passive Sigma Delta Modulator for Low Power ADC,"
By K. Sarangam and N. B. Rao,
2020 11th International Conference on Computing, Communication and Networking Technologies (ICCCNT),,
2020
SRAM cell with better read and write stability with Minimum area
By B. N. K. Reddy, K. Sarangam, T. Veeraiah and R. Cheruku,
TENCON 2019 - 2019 IEEE Region 10 Conference (TENCON),,
2019
A 10-bit 25MSPS low power pipeline ADC for Mobile HDTV Receiver System
By K. Dongre, P. Akre, R. Kamdi and K. Sarangam,
2014 International Conference on Electronics and Communication Systems (ICECS),,
2014
Book Chapter(s)
2D Material-based FETs for Next Generation Integrated Circuits
By Aruru Sai Kumar, V. Bharath Srinivasulu and K Sarangam in
Handbook of Advanced Field Effect Transistors, 2024 (Wiley),
Wiley,
.,
2026
A Novel Low-Power Approach of 8-bit Vedic Multiplier Using Reversible Logic Gates
By Aruru Sai Kumar, K Sarangam and P. Ravi Shankar in
Handbook of Advanced Field Effect Transistors, 2024,
Wiley,
.,
2026
Patent(s)
A REAL TIME TRACKING AND STOP REQUEST SYSTEM WITH DYNAMIC AND EMERGENCY ALERTS FOR ELECTRIC VEHICLES (202541016150)
Last updated on July 9, 2026