NIT Warangal

Information

Room No: EC216 +91-870-246 ektagoel@nitw.ac.in Bio Sketch

Key Notes

Journal(s): 31
Book Chapter(s): 1
Text Book(s): 1
PhD: Current - 6 Awarded - 2

33

PUBLICATIONS

8

DOCTORAL STUDENTS

2

PROJECTS

Research Areas

VLSI, Microelectronics, Semiconductor Devices

EDUCATION QUALIFICATION

Degree	Institute	Year
Doctor of Philosophy	IIT (BHU), Varanasi	2018
Master of Technology	IIT (BHU), Varanasi	2013

COURSES HANDLED

Course	L-T-P	Credit	Degree Level
Synthesis of Digital Systems(EC331)	3-0-0	3	UG
Digital System Design(EC1202)	3-0-0	3	UG
FPGA based System Design(EC252)	3-0-0	3	UG
Advanced Computer Architecture(EC26026)	3-0-0	3	PG
Advanced Computer Architecture(EC5171)	3-0-0	3	UG, PG
Modern Computer Architecture(EC5271)	3-0-0	3	PG
Digital Electronics(EC281)	3-0-0	3	UG
Electronic Devices and Circuits(EC101)	3-0-0	3	UG
Electronic Circuits Analysis and Design(EC151)	3-0-0	3	UG

RESEARCH IDs

PUBLICATIONS

Journal(s)

Impact of Interface Traps on Reliability in Negative Capacitance Source Pocket Double Gate TFET., By Babu KM and Goel E., Springer, Arabian Journal for Science and Engineering, vol., pp., 2025

Impact of Interface Trap Charges on the Performance and Reliability of Heterojunction Hetero Dielectric Vertical Non-Uniform Channel Double Gate TFET, By Macherla SK and GOEL E, IOP Science, ECS Journal of Solid State Science and Technology, vol., pp., 2025

Nanosheet Field Effect Transistors: A Comprehensive Review, By M. Balasubrahmanyam, Archana Pandey, and Ekta Goel, IOP Science, ECS Journal of Solid State Science and Technology, vol.14, pp.p. 013005, 2025

Performance and temperature analysis of pocket-engineered vertical non-uniform channel double-gate TFET with heterojunction and heterodielectric design, By SK Macherla, E Goel, Springer, Microsystem Technologies, vol., pp., 2025

A comprehensive analysis of SNSFET, HS-NSFET and PHS-NSFET: Temperature and channel doping perspective, By M Balasubrahmanyam, E Goel, Elsevier, Micro and Nanostructures, vol., pp., 2025

Exploring analog VLSI architectures for linear regulators and high-speed receivers: a comprehensive SLR and emerging innovations. , By Nagula S, Patri SR, Goel E, Analog Integrated Circuits and Signal Processing, Springer, vol., pp., 2025

Role of Spacer Dielectric Engineering in Performance Improvement of Advanced TreeFETs for Nanoscale Applications, By M. Balasubrahmanyam and E. Goel, IEEE, IEEE Transactions on TDEI, vol., pp., 2025

Negative capacitance source pocket double gate tunnel FET as a label-free dielectrically modulated biosensor, By Babu KM and Goel E, IOP Publishing, Physica Scripta, vol., pp., 2025

Analysis of Negative Capacitance Source Pocket Double-Gate TFET with Steep Subthreshold and High ON–OFF Ratio, By Babu, K.M.C., Goel, E, Springer, Journal Of Electronic Materials, vol.53, pp.3861-3869, 2024

Circuit Level Implementation of Negative Capacitance Source Pocket Double Gate Tunnel FET for Low Power Applications, By Babu KM, Goel E, IOP Publishing, ECS Journal of Solid State Science and Technology, vol.13, pp., 2024

GaSb/Si Heterojunction Based Pocket Engineered Vertical Non-Uniform Channel Double Gate TFETs for Low Power Applications, By Macherla SK, GOEL E, IOP Publishing, ECS Journal of Solid State Science and Technology, vol., pp., 2024

DC and RF Performance Optimization of Source Pocket Designed Hybrid-Dielectric Vertical Nanowire Tunnel-FET: Low Power Perspective, By Macherla SK, Goel E, Singh AK, and Pandey A, IOP Science, ECS Journal of Solid State Science and Technology, vol., pp., 2024

Device reliability of negative capacitance source pocket double gate TFETs: a study on temperature and noise effects, By Babu KM, Goel E, IOP Science, ECS Journal of Solid State Science and Technology, vol., pp., 2024

A simulation study of the effect of trap charges and temperature on performance of dual metal strip double gate TFET., By Nikhil K, Babu KM, Talukdar J, Goel E., Springer, Silicon, vol., pp., 2024

Efficient modeling of double absorber layered structure in perovskite solar cells using machine learning techniques, By Prasanna JL, Goel E, Kumar A, IOP Publishing, Physica Scripta, vol.98, pp., 2023

Numerical investigation of MAPbI3 perovskite solar cells for performance limiting parameters, By Prasanna, J.L., Goel, E. & Kumar A, Springer, Optical and Quantum Electronics, vol.55, pp., 2023

Reduced interfacial recombination in perovskite solar cells by structural engineering simulation, By Prasanna JL, Goel E, Kumar A, IOP Science, Journal of Optics, vol., pp., 2022

. Impact of High-K Gate Stack on Subthreshold Performance of Double-Gate (DG) MOSFETs, By Goel, E, Springer, Silicon, vol.14, pp., 2022

Bandgap graded perovskite solar cell for above 30% efficiency, By Prasanna JL, Goel E, Kumar A, Laref A, Santhosh C, Ranjan P, Kumar A, Elsevier, Optik, vol.269, pp., 2022

Evolution of Tunnel Field Effect Transistor for Low Power and High Speed Applications, By Babu, K.M.C., Goel, E, Springer, A Review. Silicon , vol.14, pp., 2022

2-D Analytical Drain Current Model of Double-Gate HeterojunctionTFETs With a SiO₂/HfO₂ Stacked Gate-Oxide Structure, By Sanjay Kumar, Kunal Singh, Sweta Chander, Ekta Goel, Prince Kumar Singh, Kamalaksha Baral, Balraj Singh, and Satyabrata Jit, IEEE, IEEE Transactions on Electron Devices, vol.65, pp., 2018

2-D Analytical Modeling of Threshold Voltage for Graded-Channel Dual-Material Double-Gate MOSFETs”, By Ekta Goel, Sanjay Kumar, Kunal Singh, Balraj Singh, Mirgender Kumar, and Satyabrata Jit, IEEE, IEEE Transactions on Electron Devices, vol.63, pp., 2017

Ferro-electric stacked gate oxide heterojunction electro-statically doped source/drain double-gate tunnel field effect transistors: A superior structure, By Balraj Singh, Trailokya Nath Rai, Deepti Gola, Kunal Singh, Ekta Goel, Sanjay Kumar, Pramod Kumar Tiwari, and Satyabrata Jit, Elsevier, Materials Science in Semiconductor Processing, vol.71, pp., 2017

Analytical Modeling of Subthreshold Characteristics of Ion-Implanted Symmetric Double Gate Junctionless Field Effect Transistors, By Balraj Singh, Deepti Gola, Kunal Singh, Ekta Goel, Sanjay Kumar and Satyabrata Jit, Elsevier, Materials Science in Semiconductor Processing, vol.58, pp., 2017

Analytical threshold voltage modeling of ion-implanted strained-Si doublematerialdouble-gate (DMDG) MOSFETs, By Ekta Goel, Balraj Singh, Sanjay Kumar, Kunal Singh, and Satyabrata Jit, Springer, Indian Journal of Physics, vol.91, pp., 2017

2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure, By Sanjay Kumar, Ekta Goel, Kunal Singh, Balraj Singh, Prince Kumar Singh, Kamalaksha Baral, and Satyabrata Jit, IEEE, IEEE Transactions on Electron Devices, vol.64, pp., 2017

Two-dimensional model for subthreshold current and subthreshold swing of graded-channel dual-material double gate (GCDMDG) MOSFETs, By Ekta Goel, Sanjay Kumar, Balraj Singh, Kunal Singh, Satyabrata Jit, Elsevier, Superlattices and Microstructures, vol.106, pp., 2017

2-D Analytical Modeling of Subthreshold Current and Subthreshold Swing for Ion-Implanted Strained-Si Double-Material Double-Gate (DMDG) MOSFETs, By Ekta Goel, Kunal Singh, Balraj Singh, Sanjay Kumar, and Satyabrata Jit, Springer, Indian Journal of Physics, vol.91, pp., 2017

A Compact 2D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors with a SiO2/High-k Stacked Gate-Oxide Structure, By Sanjay Kumar, Ekta Goel, Kunal Singh, Balraj Singh, Mirgender Kumar and Satyabrata Jit, IEEE, IEEE Transactions on Electron Devices, vol.63, pp., 2016

Strain-Induced Plasma Radiation at Terahertz Domain in Strained-Si-on-Insulator MOSFETs, By Mirgender Kumar, Sanjay Kumar, Ekta Goel, Kunal Singh, Balraj Singh, and Satyabrata Jit,, IEEE, IEEE Trans.on Plasma Science, vol.44, pp., 2016

Analytical Modeling of Channel Potential and Threshold Voltage of Double Gate Junctionless Field Effect Transistors with a Vertical Gaussian-Like Doping Profile, By Balraj Singh, Deepti Gola, Kunal Singh, Ekta Goel, Sanjay Kumar and Satyabrata Jit, IEEE, IEEE Transactions on Electron Devices, vol.63, pp., 2016

Text Book(s)

Nanoscale Field Effect Transistors: Emerging Applications By Ekta Goel and Archana Pandey (Editors) (Published by: Bentham Science), Edited, 2023

Book Chapter(s)

Transition from Conventional FETs to Novel FETs, SOI, Double Gate, Triple Gate, and GAA FETS By J Kandpal, E Goel in Nanoscale Field Effect Transistors: Emerging Applications, Bentham Science Publishers, Book Chapter, 2023

PROJECT / CONSULTANCY

High efficiency dual linear polarized phased antenna array system for X-band application

Role: Co-Principal Investigator
Type: Research
Sponsor: ISRO Headquarters, Antariksh Bhavan, New BEL Road, Bengaluru
Project Cost (INR): 1961000
Date of Commencement: 29-01-2025
Duration: 24 Months
Status: Ongoing

Performance Analysis of Tunnel FET

Role: Principal Investigator
Type: Research
Sponsor: Research Seed Grant, NITW
Project Cost (INR): 500000
Date of Commencement: 01-01-2020 Date of Completion: 31-12-2022
Duration: 35 Months
Status: Completed

RESEARCH FELLOWS / PhD STUDENTS